Realization of a memcapacitance emulator utilizing a singular current-mode active block

Mihajlo Tatović – Predrag B. Petrović

   This paper introduces a novel circuit design for a memcapacitance emulator, employing a single Voltage Differencing Current Conveyor (VDCC) as its core element. The emulator circuit has been intricately designed, employing only capacitors as grounded passive components. One remarkable aspect of these circuits is their inherent electronic tunability, allowing for precise control of the achieved inverse memcapacitance. The theoretical analysis of the emulator includes a comprehensive examination of potential non-idealities and parasitic influences. Careful selection of passive circuit elements has been made to minimize the impact of these undesirable effects. In contrast to extant designs cataloged in the existing literature, the presented circuitry manifests remarkable simplicity in its configuration. Furthermore, it exhibits a wide operational frequency range, extending up to 50MHz, and effectively clears the non-volatility criterion. To substantiate the efficacy of the devised circuits, comprehensive LTSpice simulations have been conducted, employing a 0.18 µm TSMC process parameter and a power supply of ±0.9 V. These simulations provide robust evidence of the emulator's performance, reaffirming the feasibility and practicality of the proposed approach in the domain of memcapacitance emulation.

Keywords: memcapacitor, emulator, VDCC, grounded passive components, electronic controller, simulation

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